Nano Letters, Journal Year: 2025, Volume and Issue: unknown
Published: April 24, 2025
Sustaining digital evolution demands high-performance logic technology with a high density, speed, and low power consumption to process large data sets efficiently. Power remains critical issue in miniaturized devices, impacting reliability, device lifetime, circuit scalability. This review explores key parameters FETs manage consumption, examining advancements both unit array structures. We provide detailed overview of the development history FETs, highlighting structural innovations challenges for achieving consumption. Furthermore, we investigate state-of-the-art potential 2D materials (2DMs) 3D-stacked structures, such as 2DM-MBC CFETs, emphasizing their benefits ultralow devices. Finally, address current progress developing 2DM NMOS PMOS CFET industrialization present an outlook on advancing meet future technology.
Language: Английский