Dielectric Integrations and Advanced Interface Engineering for 2D Field‐Effect Transistors DOI Open Access
Fuyuan Zhang, Junda Song,

Yujia Yan

et al.

Small Methods, Journal Year: 2025, Volume and Issue: unknown

Published: March 17, 2025

Abstract As silicon‐based transistors approach their physical limits, the challenge of further increasing chip integration intensifies. 2D semiconductors, with atomically thin thickness, ultraflat surfaces, and van der Waals (vdW) capability, are seen as a key candidate for sub‐1 nm nodes in post‐Moore era. However, low dielectric quality, including discontinuity substantial leakage currents due to lack nucleation sites during deposition, interfacial states causing serious charge scattering, uncontrolled threshold shifts, bad uniformity from doping damage, have become critical barriers real applications. This review focuses on this possible solutions. The functions materials criteria devices first elucidated. methods high‐quality channels, such surface pretreatment, using native oxides, buffer layer insertion, vdW transfer, new materials, then reviewed. Additionally, advanced 3D is also discussed. Finally, paper concluded comparative summary outlook, highlighting importance state control, p‐type compatibility silicon processes.

Language: Английский

Treatment of an Unconfirmed Quality According to 8D Using the Problem-Solving Tool (PST) System a Case Study in an International Company DOI Creative Commons

Souad Lahmine,

Fatima Bennouna

Journal of Machine Engineering, Journal Year: 2025, Volume and Issue: unknown

Published: March 8, 2025

This study presents a qualitative case analysis of global organization addressing non-conformity in the crimping process connector using 8D methodology and digital Problem-Solving Tool (PST). The research demonstrates how PST, Quality 4.0 tool, enhances by streamlining problem-solving workflows, improving traceability, facilitating collaboration. By leveraging technologies, PST enables faster root cause identification, more effective corrective actions, better overall production quality. findings emphasize value integrating advanced tools modern manufacturing, highlighting their potential to overcome limitations traditional quality methods resolving complex challenges. underscores transformative role technologies elevating control practices fostering continuous improvement, offering practical insights for organizations seeking enhance operational efficiency through innovation.

Language: Английский

Citations

0

Reconfigurable Inverter Based on Ferroelectric-Gating MoS2 Field-Effect Transistors toward In-Memory Logic Operations DOI

Shufang Dong,

Mingjie Li, Zhongyang Liu

et al.

The Journal of Physical Chemistry Letters, Journal Year: 2025, Volume and Issue: unknown, P. 1847 - 1854

Published: Feb. 14, 2025

With the advancement of information technology in contemporary society, there is an increasing demand for rapid processing large amounts data. Concurrently, traditional silicon-based integrated circuits have reached their performance limits due to exacerbation non-ideal effects. This necessitates further multifunctionalities and miniaturization modern circuits. In recent years, two-dimensional (2D) materials demonstrated exceptional physical electrical properties emerged as a promising method development next-generation electronic devices. Ferroelectric enable flexible adjustment polarization states, thereby simultaneously achieving non-volatile memory modulation carrier transport. Moreover, reconfigurable logic allows dynamic computational functions when different tasks are executed, significantly enhancing logical operation capabilities. Here, we report inverter based on ferroelectric-gating MoS2 field-effect transistors. Notably, ferroelectric transistor achieves high Ion/Ioff ratio ∼106 window ∼20 V. Furthermore, realized using two as-fabricated transistors (FeFETs) can produce three distinct output logics (including always "0", "1", inverter) states under same input. study provides strategy transistors, offering potential functional block in-memory computing.

Language: Английский

Citations

0

Dielectric Integrations and Advanced Interface Engineering for 2D Field‐Effect Transistors DOI Open Access
Fuyuan Zhang, Junda Song,

Yujia Yan

et al.

Small Methods, Journal Year: 2025, Volume and Issue: unknown

Published: March 17, 2025

Abstract As silicon‐based transistors approach their physical limits, the challenge of further increasing chip integration intensifies. 2D semiconductors, with atomically thin thickness, ultraflat surfaces, and van der Waals (vdW) capability, are seen as a key candidate for sub‐1 nm nodes in post‐Moore era. However, low dielectric quality, including discontinuity substantial leakage currents due to lack nucleation sites during deposition, interfacial states causing serious charge scattering, uncontrolled threshold shifts, bad uniformity from doping damage, have become critical barriers real applications. This review focuses on this possible solutions. The functions materials criteria devices first elucidated. methods high‐quality channels, such surface pretreatment, using native oxides, buffer layer insertion, vdW transfer, new materials, then reviewed. Additionally, advanced 3D is also discussed. Finally, paper concluded comparative summary outlook, highlighting importance state control, p‐type compatibility silicon processes.

Language: Английский

Citations

0